CSE 320 Back to CSE Courses

Course CSE320
Title Computer Architecture
Credits 3
Course Coordinator Tzi-Cker Chiueh
Current Catalog Description

Covers the detailed physical implementation techniques for floating-point data path, advanced pipeline control, multi-level memory hierarchy, I/O and disk subsystem, architectural support for operating systems and programming languages, and multiprocessor/multicomputer architectures.

Prerequisite

CSE220

Course Goals
  • Enhance the students' understanding of the design principles of instruction set architecture by presenting the programming flexibility, hardware complexity, and implementation efficiency of complex versus reduced instruction set computers.
  • Expand the students' knowledge on computer organization by discussing advanced micro-architectural implementation techniques such as computer arithmetic, memory hierarchy, bus design, pipelining, and disk I/O.
  • Discuss architectural support for operating systems and programming languages such as virtual memory, exceptions and interrupts, break points, synchronization, and direct memory access.
Textbook
  • Computer Organization and Design, By Patterson and Hennessy Morgan Kaufmann 4th edition 2008 ISBN: 978-0-12-374493-7
Major Topics Covered in Course
  • Computer Abstractions and Technology: Computer organization, program compilation and execution, technology trends, (0.5 week)
  • Performance Evaluation Methodology: Performance metrics, choosing benchmark programs and benchmarking, performance analysis, (0.5 week)
  • Instruction Set Architecture: Addressing mode, conditional branch, accumulator vs. register file vs. stack, load/store architecture, RISC vs. CISC, (1.5 weeks)
  • Computer Arithmetic: Integer addition, multiplication, and division, floating-point arithmetic, rounding, Booth algorithm, SRT division , (2 weeks)
  • Control Path Design: Single-cycle vs. multi-cycle, random logic vs. ROM-based vs. microprogramming (1 week)
  • Pipeline: Structural/data/control hazard, pipeline stall and flush, static vs. dynamic branch prediction, instruction scheduling, Tomasulo_ algorithm, precise exception, (2 weeks)
  • Memory Hierarchy: Basics of data and instruction cache, translation look-aside buffer, virtual memory, address space protection, (2 weeks)
  • Disk I/O: Disk access model, redundant array of inexpensive disks (RAID), storage area networks, high-performance file system, (1 week)
  • Multiprocessors: Shared-memory multiprocessor, cache coherence, PC cluster, low-latency message passing, system area networks, parallel compiler, (1.5 weeks)
Laboratory Projects
  • Develop an assembly language program that has a buffer overflow vulnerability, and correct the vulnerability using a return address defense mechanism (2 weeks)
  • Implement the SRT integer division algorithm for 32-bit unsigned numbers using C (2 weeks)
  • Modify a cache simulator to analyze various reference patterns in instruction traces, e.g.,the degree of conflict misses (2 weeks)
Course Webpage /~cse320
Department of Computer Science • Stony Brook University, Stony Brook, NY 11794-4400 • 631-632-8470 or 631-632-8471