CSE 502 Computer Architecture (Fall 2009)

Recent Notices


Course Description

This is a graduate-level computer architecture course. Students who plan to take this course are expected to have the level of maturity in computer architecture provided in CSE320. If you don't have that background and still want to take this course, please come and talk to me first. This semester we will explore current trends in computer architecture, in particular, the head-long rush into parallel computing for modern commercial microprocessors, especially the development of energy-efficient grid-computers-on-single-chips. Lectures will follow the lastest, 4th edition (2006) text rather closely, after a review of instruction pipelines (Appendix A) and memory hierarchies (Appendix C). A few relevant architecture papers may be made available on the website for students to read, critique, and discuss in class.

There will be a research project intended mainly for PhD students, an early preparedness assessment quiz, an in-class midterm exam, and a final exam, both exams open books/notes/lectures. In addition, there will be four or five very important homework sets, taken mainly from exercises in the text.

The final grade will be based on: 4% in-class Quiz, 8% (Optional) Research Project, 18% Homework, 20% Midterm, and 50% Final Exam. The workload is estimated to be 15 to 25 hours per week.

Administrative Matters

Special Needs

If you have a physical, psychological, medical or learning disability that may impact on your ability to carry out assigned course work, I would urge that you contact the staff in the Disabled Student Services office (DSS), Room 133 Humanities, 632-6748/TDD. DSS will review your concerns and determine, with you, what accommodations are necessary and appropriate. All information and documentation of disability is confidential.

All Notices

Reading and project handouts

Lecture Slides

  • Lect01+2+3 Introduction Tu9/1-Th9/3-Tu9/8/09 ppt / pdf
  • Lect03+4+5 Performance and Pipelining Tu9/8-Th9/10-Tu9/15/09 (updated Mon 9/21/09) ppt / pdf
  • Lect06+7 Memory Hierarchy cache + VM Th9/17-Tu9/22/09 (re-updated Wed 11/4/09)(updated Mon 9/21/09) ppt / pdf
  • No Lectures: Quiz Th9/24/09; School Holiday Makeup Tu9/29/09; Quiz Answers Tu10/6/09
  • Lect08+9+10 Instruction Level Parallelism Loop Unrolling, Branch Prediction, OoO Out-of-Order Xeq Th10/1,8,-Tu10/13/09 (updated Wed 11/4/09) ppt / pdf
  • Lect11 Simultaneous Multithreading Th10/15/09 ppt / pdf
  • Lect12+13+14 Vector Processing Th10/22-Tu10/27-Th10/29/09 ppt / pdf
  • Lect15 Mid-Term Review Tu11/3/09 (4 files) ppt 6.1MB / pdf 2.9MB
    . . . . . . . Sample MidTerm (2002) without answers pdf
    . . . . . . . Topics Outline + Sample MidTerm (2002) with answers pdf
  • Lect16+17+18 Symmetric MultiProcessing SMP Tu11/10-Th11/12-Tu11/17/09 ppt / pdf
  • Lect18+19 Directory-Based Cache Coherency + MP Synchronization Tu11/17-Th11/19/09 ppt / pdf