CSE 635 -- Asynchronous Systems
Fall 1998
Fri 1:00-3:00, Room: CASP Lab Conference Room

Instructors
Rance Cleaveland (rance AT cs DOT sunysb DOT edu)
World Wide Web: http://www.cs.sunysb.edu/~rance
Office: Computer Science Bldg., Room #1432, ext. 2-8448
Office Hours: Wednesday and Friday, 1:30-2:30, or by appointment

Scott A. Smolka (sas AT cs DOT sunysb DOT edu)
World Wide Web: http://www.cs.sunysb.edu/~sas
Office: Computer Science Bldg., Room #1423, ext. 2-8453
Office Hours: Monday and Wednesday, 5:00-6:00, or by appointment

Text
Concurrency in Programming and Database Systems,
A.J. Bernstein and P.M. Lewis, Jones and Bartlett Publishers, Inc., 1993.

Course Description
This is a course on the theory and practice of asynchronous systems; i.e., systems composed of concurrently executing sequential processes that, from time to time, synchronize to exchange data or to cooperate on a common task. Asynchronous systems are noteworthy in their absence of a global clock and are generally felt to be much harder to program correctly than their sequential counterparts. Examples of asynchronous systems are multiprogramming computer systems, concurrent/distributed database systems, process control systems such as a factory automation system or a fly-by-wire aircraft controller, and communication protocols.

The course will be divided into two parts: concurrency theory and tools & applications. The concurrency theory portion will cover such topics as Hoare logic for shared memory concurrent programs and synchronous communication (such as the type found in CSP), process algebra (e.g., Milner's CCS), and temporal logic. The tools & applications part will focus on the specification/verification tools Spin (Gerard Holzmann, AT&T Bell Labs) and the Concurrency Factory (Stony Brook), and application areas such as communication protocols, cache coherency protocols, and hardware designs. A recurring theme will be model checking, a verification technique aimed at determining whether a system specification satisfies a temporal-logic formula. The following outlines the topics to be covered this semester, and gives an estimate of the time to be spent on each topic:

I. Concurrency Theory
A. Hoare Logic
Sequential Programs (1 week)
Owicki-Gries - shared memory (1 week)
Levin-Gries - synchronous message passing (1 week)
B. Process Algebra, Temporal Logic, & Model Checking
Milner's CCS (2 weeks)
ISO's LOTOS (1 week)
Temporal Logic & Model Checking (2 weeks)
Real-Time Process Algebra & Temporal Logic (1 week)

II. Tools and Applications
A. Spin and Promela (1 week)
B. The Concurrency Factory (1 week)
C. Protocol Verification (1 week)
D. Hardware Verification (1 week)

CourseWork
The following, which is subject to change, is a summary of the work required for this course.
Reading Assignments:
You will be responsible for reading Chapters 1, 2, 4, and 6-8 of Bernstein and Lewis. The remainder of the reading assignments will come from articles that we hand out over the course of the semester.
Homework Assignments:
There will be four homework assignments. They will count for 40% of your final grade.
Final Project:
You are to specify and attempt to verify an asynchronous system of your choice either by hand (i.e., on paper using one of the formal techniques discussed in class) or with the aid of one or more of the tools discussed in class. The final project will count for 60% of your final grade.
You can work by yourself or choose a partner from the class. If you work in a team of two, you will be expected to take on a more formidable project. The following schedule will be in effect for the final project:
Sep. 24: Identify the system you will specify and verify, or the programming project you will undertake, and the supporting
documentation for your project.
Oct. 22: Progress report due.
Dec. 3: Demonstrate your specification and verification, and hand in final report.

The first task is in some sense the most important and also the most difficult, so get started right away. I will provide ideas for candidate systems, which can be software (e.g., a communications protocol) or hardware (e.g., a cache coherency protocol). Other professors in the department may also contribute ideas for projects (e.g., Profs. Smith and Chiueh). Please use HTML to write your reports and make them accessibile from your homepages.

Click here for a description of potential term projects.

Last update, September 2, 1998, by Scott Smolka.
If you have any problems, mail sas@CS.SunySB.EDU